| 摘要 |
<p>A system is disclosed for allocating the processing resources of a processor (20), often referred to as MIPs to functions in a queue (a) waiting to be executed in association with the information content of a communication channel (22). This system includes a digital signal processor (DSP) (20) having a number of communication ports (21), a number of communication channels (22), each connected to a different one of the communication ports (21), and a MIPs monitor (60) with a capacity determining device within the DSP for determining an amount of the resource available to be assigned, a load determining device within the DSP for determining an estimate of the resource needed for each function waiting in the queue to execute, and an allocating device within the DSP for allocating the resource to the functions based on a hierarchical priority scheme.</p> |
