发明名称 Flip-chip packaging process utilizing no-flow underfill technique
摘要 A flip-chip packaging process is proposed, which can help assure reliable electrical bonding between chip-side solder bumps and substrate-side bond pads without being made open-circuited by the electrically-insulative material being used for flip chip underfill. The proposed flip-chip packaging process is of the type utilizing a no-flow underfill technique to prevent short-circuiting between neighboring solder bumps, and is characterized in the fabrication of electrically-conductive sharp-pointed studs over substrate-side bond pads to prevent open-circuiting between chip-side solder bumps and substrate-side bond pads. These electrically-conductive sharp-pointed studs can pierce into the chip-side solder bumps when mounting the flip chip onto the substrate, so that during subsequent solder-reflow process, the piercing of these sharp-pointed studs in the solder bumps can help allow the solder bumps to be reliably wetted to the substrate-side bond pads, thereby establishing reliable electrical bonding between the chip-side solder bumps and the substrate-side bond pads. The finished flip-chip device is therefore more assured in quality and reliability.
申请公布号 US6489180(B1) 申请公布日期 2002.12.03
申请号 US20000685433 申请日期 2000.10.10
申请人 SILICONWARE PRECISION INDUSTRIES CO., LTD. 发明人 TSAI YING CHOU;CHIU SHIH KUANG
分类号 H01L21/56;H01L23/498;(IPC1-7):H01L21/44;H01L21/48;H01L21/50 主分类号 H01L21/56
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