发明名称 Reduction of offset voltage in current mirror circuit
摘要 A current mirror includes at least two pairs of metal oxide semiconductor field effect transistors (MOSFETs), preferably manufactured using complementary metal oxide semiconductor (CMOS) technology. Each MOSFET includes a gate, a source, and a drain, and each MOSFET operates according to a set of characteristic curves, wherein each curve includes a linear region and a saturation region. Each pair of MOSFETs is configured in series. A first current passes through the first pair of MOSFETs, and a second current passes through the second pair of MOSFETs. The first MOSFET of the first pair is electrically connected to the first MOSFET of the second pair, and the second MOSFET of the first pair is electrically connected to the second MOSFET of the second pair. A voltage difference between the first MOSFET of the first pair and the first MOSFET of the second pair is a first offset voltage, and a voltage difference between the second MOSFET of the first pair and the second MOSFET of the second pair is a second offset voltage. The second offset voltage is reduced by simultaneously operating the second MOSFET of the first pair in the linear region of one of its characteristic curves and operating the second MOSFET of the second pair in the linear region of one of its characteristic curves.
申请公布号 US6489827(B1) 申请公布日期 2002.12.03
申请号 US20000698236 申请日期 2000.10.30
申请人 MARVELL INTERNATIONAL, LTD. 发明人 SUTARDJA SEHAT
分类号 G05F3/26;(IPC1-7):H03L5/00 主分类号 G05F3/26
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