| 摘要 |
PROBLEM TO BE SOLVED: To provide a method and apparatus for signaling between devices of a memory system. SOLUTION: These method and apparatus relate to timing adjustment performance, bit time adjustment performance, cycle time selection, use of differential and/or non-differential signaling for bus signals and/or clock signals, termination structures on a bus, including integrated termination structures, use of active circuitry to allow adjustment to different characteristics bus impedances and power-state control, including a calibration process to optimize a termination value, use of slew rate control circuitry and transfer characteristics control circuitry in the predriver and driver of transmitter blocks to allow adjustment to different characteristics bus impedances and to allow adjustment for other bus properties, a memory component designed to prefetch words that are wider than the width of the data bus so that the memory access bandwidth approximately matches the transfer bandwidth, and a memory component able to adjust the size of the prefetch word to accommodate connection to data buses of different width.
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