发明名称 Clock signal decoupling for synchronous operation
摘要 Method and apparatus is described for decoupling data from a clock signal and recoupling the data to a different clock signal for subsequent synchronous processing by a pointer processor. More particularly, on a receive or drop side, one buffer is configured to store payload pointers and a synchronous payload envelope arriving clocked by a line clock signal, while another buffer is configure to store TOH or SOH arriving clocked by the line clock signal. Each buffer clocks out such stored information off of a same system clock signal, such as a drop clock signal. On a transmit or add side, a buffer is configured to store payload pointers and a synchronous payload envelope. This buffer clocks in such stored information off of a system clock signal, such as an add clock signal, and clocks out such stored information off of a transmit reference clock signal. Output of such buffers, whether on a drop or add side, is provided to a pointer processor buffer, where both an input side and an output side of the pointer processor buffer are operated off of a system clock signal or a signal synchronized with the system clock signal.
申请公布号 US2002172225(A1) 申请公布日期 2002.11.21
申请号 US20010930102 申请日期 2001.08.14
申请人 ANG OON-SIM;TSUJI BARRY KAZUTO;VARELAS ORESTE BASIL 发明人 ANG OON-SIM;TSUJI BARRY KAZUTO;VARELAS ORESTE BASIL
分类号 H04J3/16;(IPC1-7):H04J3/06 主分类号 H04J3/16
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