发明名称 METHOD FOR TESTING LEAK CURRENT AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a technology to facilitate detection of abnormality of a leak current. SOLUTION: When a semiconductor integrated circuit 200 is structured by including function modules 207, 208, 209 for dealing a test pattern taken in synchronization with a clock signal, a clock control means 202 for stopping supply of the clock signal to the function modules in every predetermined step of a test pattern, and a current measuring circuit 250 capable of measuring the current flowing in the function modules at every stop of the supply of the clock signal to the function modules are further provided so that detection of the abnormality of the leak current can be facilitated by acquiring a measurement result of the current in a plurality of steps.</p>
申请公布号 JP2002323546(A) 申请公布日期 2002.11.08
申请号 JP20010126830 申请日期 2001.04.25
申请人 HITACHI LTD 发明人 OSAKABE HIDETOSHI
分类号 G01R31/316;G01R31/28;G01R31/319;G06F15/78;(IPC1-7):G01R31/316 主分类号 G01R31/316
代理机构 代理人
主权项
地址