Integrated bus-signal hold cell e.g. for distributed information sources, uses two inverters for holding last state of bus-line

摘要

An integrated bus-signal hold cell (2) is coupled via a common I/O with a bus-line (1). Two inverters (3,4) hold the last state of the bus-line (1), and their outputs are coupled to the input of other inverters, where the first inverter (3) is coupled on the input side, and the second inverter (4) on the output side, are coupled to the I/O. An additional input (TDI) is used to pass a defined test signal to the bus-signal hold cell (2). Independent claims are included for the following: (A) An integrated bus system; and (B) A method for driving an integrated bus-signal hold cell.