| 摘要 |
PURPOSE: A method for fabricating a semiconductor device is provided to prevent an increase of a junction leakage current in spite of a deep salicide layer by forming a source/drain region in an active area on the edge of an isolation layer, and to reduce a short channel effect by preventing dopants from affecting a channel region in an ion implantation process for forming the source/drain region. CONSTITUTION: The isolation layer(21) for defining the active area is formed on a semiconductor substrate(20). A gate insulation layer(22) is formed. A gate electrode(23) is formed on the gate insulation layer. Low density impurity ions are implanted into the semiconductor substrate at both sides of the gate electrode to form a lightly-doped-drain(LDD) region(24). An insulation layer spacer(25) is formed on the sidewall of the gate electrode. A passivation layer pattern exposing the gate electrode, the insulation layer spacer and a partial LDD region adjacent to the insulation layer spacer is formed. A selective-epitaxial-growth(SEG) layer(27) is formed on the semiconductor substrate exposed to the passivation layer pattern. The passivation layer pattern is eliminated. High density impurity ions are implanted to form the source/drain region, wherein a shallow source/drain region(28) is formed under the SEG layer and a deep source/drain region(29) is formed in the active area on the edge of the isolation layer having no SEG layer. A silicide layer(30) is formed on the gate electrode, the upper portion and the side surface of the SEG layer and an exposed active area.
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