发明名称 STATE MACHINE, COUNTER, WRONG OPERATION DETECTION CIRCUIT, WRONG OPERATION DETECTION METHOD, PROGRAM RECORDING MEDIUM AND PROGRAM
摘要 PROBLEM TO BE SOLVED: To provide a small-scale wrong operation detection circuit and a state machine for detecting and correcting a wrong operation by the wrong operation detection circuit. SOLUTION: A generation circuit 110 generates a second state value by reversing the lowest bit, the lowest bit and a center bit, or all bits of a first state value stored in a resistor 120 in every state transition. Excusive-OR circuits 131, 132, 133 determine if the first and the second state values are same every bit. AND circuits 141, 142 output a bit error signal when an upper level bit adjacent to a non-reversed bit is reversed and a NOT circuit 151 outputs a bit error signal when the lowest bit is not reversed. Exclusive-OR circuits 171, 172, 173 correct bit of the second state value corresponding to the signal. An OR circuit 161 outputs a wrong operation detection signal when one or more signals are outputted.
申请公布号 JP2002312203(A) 申请公布日期 2002.10.25
申请号 JP20010111846 申请日期 2001.04.10
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 FURUTA TAKASHI;TANASE HIROSHI
分类号 G06F11/30;(IPC1-7):G06F11/30 主分类号 G06F11/30
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