| 摘要 |
<p>A random access semiconductor memory, comprising: at least two memory banks (MB0-MB31), each memory bank including a respective two-dimensional array (2) of dynamic random access memory cells (MC), and self-refresh circuits (CNT,SA) for continuously submitting the memory cells of the respective array to a refresh operation of data stored therein independently of the other memory bank; first circuit means (AÄ0:4Ü,DEC,B0-B31) for selectively accessing one of said at least two memory banks in response to an external request of access to a memory location belonging to said memory bank; second circuit means (4,3,6) for causing in the accessed memory bank a suspension of the refresh operation of the data stored in the memory cells of the respective array while serving the external request of access, the refresh operation going on in the remaining memory bank. <IMAGE></p> |
