发明名称 |
Passivation of copper interconnect surfaces with a passivating metal layer |
摘要 |
An interconnect line on an IMD layer on a semiconductor device is formed in an interconnect hole in the IMD layer. The interconnect hole has walls and a bottom in the IMD layer. A diffusion barrier is formed on the walls and the bottom of the hole. Fill the interconnect hole with a copper metal line. Perform a CMP step to planarize the device and to remove copper above the IMD layer. Deposit a passivating metal layer on the surface of the copper metal line encapsulating the copper metal line at the top of the hole. Alternatively, a blanket deposit of a copper metal line layer covers the diffusion layer and fills the interconnect hole with a copper metal line. Perform a CMP process to planarize the device to remove copper above the IMD layer. Deposit a passivating metal layer on the surface of the copper metal line encapsulating the copper metal line at the top of the hole in a self-aligned deposition process.
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申请公布号 |
US6468906(B1) |
申请公布日期 |
2002.10.22 |
申请号 |
US20000617009 |
申请日期 |
2000.07.14 |
申请人 |
CHARTERED SEMICONDUCTOR MANUFACTURING LTD.;NATIONAL UNIVERSITY OF SINGAPORE;NAMYANG TECHNOLOGICAL UNIVERSITY OF SINGAPORE;INSTITUTE OF MICROELECTRONICS |
发明人 |
CHAN LAP;YAP KUAN PEI;TEE KHENG CHOK;IP FLORA S.;LOH WYE BOON |
分类号 |
H01L21/768;(IPC1-7):H01L21/44 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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