发明名称 |
Test pattern generator, propagation path disconnecting method, and delay fault detecting method |
摘要 |
A test pattern generator for automatically generating a test pattern for detecting a stack fault of a large scale integrated circuit an LSI with a tester includes a loop/path disconnecting section for disconnecting a loop portion of the LSI at a position where a fault detection rate is not lowered, based on net list information of the LSI and constraint of a test design rule when automatically generating the test pattern. A test pattern generator increasing fault detection rate and carrying out a suitable test is obtained. |
申请公布号 |
US6470468(B1) |
申请公布日期 |
2002.10.22 |
申请号 |
US20000477401 |
申请日期 |
2000.01.04 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
FUKUI YOSHIAKI |
分类号 |
G01R31/28;G01R31/3183;G06F11/22;G06F17/50;H01L21/82;(IPC1-7):G01R31/28;G06F9/318 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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