发明名称 Vector compare and maximum/minimum generation apparatus and method therefor
摘要 An apparatus for compare and maximum/minimum and a method therefor are implemented. Selection circuitry selects a data value signal for outputting between an a pair of vector operands and "true" and "false" comparison value signals for the corresponding operand data type. Each input operand may include a plurality of subvector operands of a preselected data type, each data type has having a corresponding length. The selection circuitry selects the data value signal in response to a plurality of second signals. The second signals are generated from carry-out signals from the subvector operands, and first signals that are generated using instruction information for the executing instruction. The second signals may be generated by logically combining the first signals with carry propagate, carry generate and carry-out signals from carry lookahead logic receiving the subvector operands as input.
申请公布号 US6470440(B1) 申请公布日期 2002.10.22
申请号 US19990315546 申请日期 1999.05.20
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 NGUYEN HUY VAN;ROTH CHARLES PHILIP
分类号 G06F9/30;(IPC1-7):G06F9/305 主分类号 G06F9/30
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