METHOD FOR FABRICATING VIA CONTACT OF SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method for fabricating a via contact of a semiconductor device is provided to prevent a void inside a via hole by basically preventing outgasing source from being radiated by transformation of a low dielectric layer. CONSTITUTION: A metal interconnection in which barrier metal layers(202a,202b) are placed on and under a metal layer(204) is formed on an insulated substrate(200). The first insulation layer(206) of a low dielectric constant is formed on the substrate. The second insulation layer(208) of a chemical vapor deposition(CVD) layer material is formed on the first insulation layer. A chemical mechanical polishing(CMP) process is performed regarding the second insulation layer to planarize the second insulation layer. The second and first insulation layers are sequentially etched to form a wide hole so that the metal interconnection is partially exposed. The third insulation layer(210) of a CVD layer material is filled in the wide hole. The third insulation layer is etched to form the via hole by using a resist pattern for defining a via hole formation part so that the meal interconnection in the wide hole is exposed. An ashing process and a wet strip process are performed. A barrier metal layer is interposed on the resultant structure to form a conductive layer so that the inside of the via hole is sufficiently filled. A CMP process is performed on the barrier metal layer to expose the second insulation layer so that a conductive plug is formed in the via hole.