发明名称 High-voltage metal oxide semiconductor device and method of forming the device
摘要 A method of forming a high-voltage metal oxide semiconductor device (MOS) includes forming a device with a high voltage support region 44 of n-type silicon. The voltage support region 44 has between 5x10<SP>15</SP> and 2x10<SP>16</SP> impurity atoms/cm<SP>3</SP>, for example phosphorous ions, in a first well 14 directly below a drift region 17. The voltage support region 44 is formed using ion implantation and a resist mask. The MOS device has a substrate 10 of p type silicon which has between 5x10<SP>19</SP> and 1.3 x 10<SP>20</SP> impurity atoms/cm<SP>3</SP>. An epitaxial layer of p type silicon 12 which has between 1x10<SP>15</SP> and 3x10<SP>15</SP> impurity atoms/cm<SP>3</SP> is formed on the substrate 10. The first well 14 of n type silicon which has between 1x10<SP>16</SP> and 4x10<SP>16</SP> impurity atoms/cm<SP>3</SP> is formed in the epitaxial layer 12. First well 14 has a first channel region 11 which is formed using ion implantation and a resist mask. The drift region 17 of p type silicon which has between 3x10<SP>16</SP> and 7x10<SP>16</SP> impurity atoms/cm<SP>3</SP>, for example boron ions, is formed in the first well 14 using ion implantation and a resist mask. The MOS device also includes a first source 16 and drain 18 of p type silicon which have 5x10<SP>19</SP> and 2x10<SP>20</SP> impurity atoms/cm<SP>3</SP>. The first source 16 and drain 18 are formed in the first well 14 using ion implantation and a resist mask. Preferably, the high voltage support region 44 avoids punch-through from the p channel drain 18 through the drift region 17 into the substrate 10 while using a standard depth for the n type well 14. The high voltage device may be integrated with a standard n or p channel device on the same chip or wafer.
申请公布号 GB2374456(A) 申请公布日期 2002.10.16
申请号 GB20000030214 申请日期 2000.12.09
申请人 * ESM LIMITED 发明人 IVOR ROBERT * EVANS
分类号 H01L21/336;H01L29/10;H01L29/78;(IPC1-7):H01L21/336 主分类号 H01L21/336
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