发明名称 Control circuit and semiconductor memory device
摘要 <p>A control circuit is disclosed for increasing the speed of a device responding to a control request from an external device when the external control request is overlapped with an internal control request. The control circuit includes a first signal processing unit (31) for receiving the first control signal and generating a first processed signal. The first signal processing unit includes a filter (35) for filtering the first control signal. A second signal processing unit (32) receives the first control signal and generates a second processed signal. An arbiter (33) receives the second processed signal and the second control signal, determines which one of the received signals is to be given priority, and generates a determination signal based on the determination. A main signal generator (34) generates the main signal from the determination signal or the first processed signal based on the determination signal. &lt;IMAGE&gt;</p>
申请公布号 EP1248266(A2) 申请公布日期 2002.10.09
申请号 EP20020250105 申请日期 2002.01.08
申请人 FUJITSU LIMITED 发明人 ITO, SHIGEMASA
分类号 G11C7/00;G11C11/403;G11C11/406;G11C11/4076;H03K19/0175;(IPC1-7):G11C11/406;G11C11/407 主分类号 G11C7/00
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