Architecture and scheme for a non-strobed read sequence

摘要

A cell (10a) to be read is connected between two bit lines (BLS,BLD) and all bit lines are connected to a Y decoder (12), connecting the lines to a supply line (14) and to a sensing line (16). A sensing module (100) that can generate one output datum uses a reference unit (104) driven by a non-strobed gate voltage. An independent claim is included for a method of sensing a close-to-the-ground signal received from a memory cell.