| 摘要 |
PROBLEM TO BE SOLVED: To provide an input circuit that is operated at a high-speed with small power consumption. SOLUTION: The input circuit is provided with a data input means (NMOS transistors(TRs) 18, 19) that receives input data, a data latch means (PMOS TRs 12, 13 and NMOS TRs 16, 17) that latches the input data, a reset means (PMOS TRs 14, 15) that resets the data latch means, a clock synchronization means (NMOS TR 20) that synchronously input the input data to the data input means, and a latch promotion means (NMOS TRs 21-24) that complementarily acts on the reset means to shut off a through-current and promotes latching of the data latch means. Controlling the NMOS TRs 21, 22 to be nonconductive in the case of resetting the latch can shut off the through-current.
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