SEMICONDUCTOR MEMORY

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor memory in which a test time for performing a leak test can be shortened. SOLUTION: One end of a power source line for each memory cell arranged in the direction of row of a memory cell group arranged in a matrix state is connected to two first and second power source supply ends each independent of the other through two switching means on-off-controlled by inverse logic based on a test mode switching signal for switching a test mode or a normal mode. At the test mode, a power source is supplied to memory cells of rows to be tested from the first power source supply end, simultaneously, a power source is supplied to memory cells other than a row to be tested from the second power source supply end.