发明名称 Silicon wafers for CMOS and other integrated circuits
摘要 Manufacturing a semiconductor wafer includes growing a silicon ingot substantially uniformly doped with boron. The ingot has a resistivity in a range of about 10 to 400 milli-ohm-centimeter and is sliced into individual wafers. The wafers are heated in an atmosphere containing hydrogen at a temperature of at least about 1,000° C. so that a significant amount of boron diffuses out of a near-surface region of the wafers. For example, after heating the wafers, the resistivity of the near-surface region of the wafers can be in the range of about 0.5 to 10 ohm-centimeter. Wafers made using the foregoing technique are particularly suited for the fabrication of CMOS integrated circuits. Even in the absence of an epitaxial layer, the lighter doping of the near-surface reduced boron concentration region enables circuit fabrication while the heavier doping of the bulk region of the wafer can help prevent the occurrence of latch-up. The technique can significantly reduce the cost of CMOS fabrication.
申请公布号 US2002142566(A1) 申请公布日期 2002.10.03
申请号 US20020155632 申请日期 2002.05.23
申请人 INTEL CORPORATION 发明人 RAVI KRAMADHATI V.;LING LI;HU SING-CHUNG S.
分类号 C30B15/00;C30B29/06;C30B33/00;H01L21/223;H01L21/30;H01L21/324;H01L21/46;H01L21/8238;H01L27/092;H01L29/10;H01L29/36;(IPC1-7):H01L21/30 主分类号 C30B15/00
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