发明名称 Error correction apparatus for performing consecutive reading of multiple code words
摘要 An error correction apparatus for performing an error correction process on digital data that is stored in a buffer memory and includes multiple code words. The device includes a memory access circuit for controlling reading and writing of the code words to the buffer memory. Operational circuits perform a syndrome calculation with each of the multiple code words read from the buffer memory. The memory access circuit consecutively reads the multiple code words from the buffer memory and distributes the code words to the operational circuits.
申请公布号 US2002144206(A1) 申请公布日期 2002.10.03
申请号 US20020105010 申请日期 2002.03.22
申请人 TOMISAWA SHIN-ICHIRO 发明人 TOMISAWA SHIN-ICHIRO
分类号 G06F12/16;G06F11/10;G11B20/18;G11C7/10;G11C11/408;H03M13/29;H03M13/37;(IPC1-7):H04L1/22;H04B1/74;G11C29/00 主分类号 G06F12/16
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