发明名称 STACKED VERTICAL IN-LINE PACKAGE
摘要 PURPOSE: A stacked vertical in-line package is provided to overcome limitation of the number of unit packages and include the unit packages of the same structure regardless of the stacked number of the unit packages. CONSTITUTION: A stacked vertical in-line package(200) is formed by erecting vertically sides of unit packages(110) of the same structure as a TSOP(Thin Small Outline Package) toward a substrate(170). A base package(100a), an ending package(110b), and a middle package(100c) inserted between the base package(100a) and the ending package(110b) are arranged on the substrate(170). Each unit package(110) includes a body(150) having a semiconductor chip and the first and the second projected terminal(132,134) to the first and the second side of the body(150). A chip selection terminal(136) is mounted on the substrate(170).
申请公布号 KR20020073848(A) 申请公布日期 2002.09.28
申请号 KR20010013727 申请日期 2001.03.16
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 BAE, GYU HWAN;JANG, OK HYEONG;KO, JUN YEONG
分类号 H01L25/10;(IPC1-7):H01L25/10 主分类号 H01L25/10
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