发明名称 Apparatus and method for an interface unit for data transfer between data processing units in the asynchronous transfer mode and in the I/O mode
摘要 In a data processing system have a master-state data processing unit and at least one slave-state data processing unit, the data processing units can be provided with an asynchronous transfer mode interface unit for transferring data cells there between. The interface unit provides and receives signals formatted in the UTOPIA protocol. The interface unit includes processor acting as a state machine and a buffer out memory unit for buffering the data groups between the interface unit processor and the direct memory access unit of the data processing unit. The interface unit can act in a receive mode and a transmit mode for a master-state data processing unit and can act in a receive mode, and transmit mode in a slave-state data processing unit. An event signal provides an efficient exchange of transfer of data between the direct memory access unit and the buffer memory storage unit in the slave mode. Through correct use of the signals exchanged with a communication bus, the UTOPIA ATM interface unit can function as an I/O unit.
申请公布号 US2002136220(A1) 申请公布日期 2002.09.26
申请号 US20010964159 申请日期 2001.09.26
申请人 ANJANAIAH SHAKUNTALA;CASTILLE ROGER KYLE;SESHAN NATARAJAN 发明人 ANJANAIAH SHAKUNTALA;CASTILLE ROGER KYLE;SESHAN NATARAJAN
分类号 H04L12/56;G06F1/24;G06F13/28;G06F13/38;G06F13/40;G06F15/16;H04L12/28;H04L12/403;H04L12/66;(IPC1-7):H04J3/12 主分类号 H04L12/56
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