发明名称 Semiconductor memory device having bitlines of common height
摘要 A semiconductor memory device includes a memory cell region having an array of a plurality of memory cells, and a peripheral circuit region to which a bit line connected to a predetermined number of the memory cells in the memory cell region is extended and connected. The bit line in the memory cell region and the bit line in the peripheral circuit region have substantially the same upper surface height.
申请公布号 US6455368(B2) 申请公布日期 2002.09.24
申请号 US20010900148 申请日期 2001.07.09
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 AOKI IASAMI
分类号 H01L21/768;H01L21/8242;H01L27/108;(IPC1-7):H01L21/824 主分类号 H01L21/768
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