发明名称 BiCMOS ESD circuit with subcollector/trench-isolated body mosfet for mixed signal analog/digital RF applications
摘要 An ESD power clamp circuit provides ESD protection for semiconductor chips through a power clamping device. The power clamping device includes a FET and a bipolar element, formed in an isolation region, and a buried diffusion. The buried diffusion is used as a subcollector for the bipolar element, and is used as an isolation for the FET.
申请公布号 US6455902(B1) 申请公布日期 2002.09.24
申请号 US20000731351 申请日期 2000.12.06
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 VOLDMAN STEVEN H.
分类号 H01L27/02;(IPC1-7):H01L29/72 主分类号 H01L27/02
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