| 摘要 |
PROBLEM TO BE SOLVED: To provide an instruction scheduling device which improves the usage efficiency of resources in a processor and also generates a high speed schedule in performing the instruction. SOLUTION: The instruction scheduling device is provided with a DAG(directed acyclic graph) generating part 1 and a ordering part 2 for analyzing the reliance relation of an instruction, adopting the instruction as a node, the mutual reliance relation of the instructions as an edge, connecting a part between the nodes by the edge and generating a graph which indicates relation between the nodes, a temporary arrangement part 3 for going round each node of the graph along the edge by using one instruction without a preceding restriction among the plurality of instructions to be a start point and successively giving an order number which indicates the order of processing cycle for performing a processing with the start point as a processing start at each going-through the node with reliance relation and a competition eliminating part 4 for conjugating the corresponding instructions at each order number and constituting the conjugated instructions at each conjugated processing cycle. The temporary arrangement part 3 goes round each of the nodes along the edge regardless of whether proceeding relation is in a forward direction or a backward direction.
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