发明名称 |
Semiconductor memory device |
摘要 |
Each of MIS transistors of a semiconductor memory device has a semiconductor layer (12); a source region (15) formed in the semiconductor layer; a drain region (14) formed apart from the source region in the semiconductor layer, the semiconductor layer between the source region and the drain region serving as a channel body in a floating state; a first gate (13) which forms a channel in the channel body; a second gate (20) formed so as to control a potential of the channel body by a capacitive coupling; and a high concentration region (21) formed in the channel body on the second gate side, impurity concentration of the high concentration region being higher than that of the channel body.
|
申请公布号 |
US2002130341(A1) |
申请公布日期 |
2002.09.19 |
申请号 |
US20010005180 |
申请日期 |
2001.12.03 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
HORIGUCHI FUMIO;OHSAWA TAKASHI;IWATA YOSHIHISA;YAMADA TAKASHI |
分类号 |
H01L27/108;H01L27/12;(IPC1-7):H01L31/119 |
主分类号 |
H01L27/108 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|