发明名称 |
Semiconductor integrated circuit manufacturing method and model parameter extracting method, apparatus, and program |
摘要 |
A parameter extracting apparatus extracts the parameters of a circuit element model that represents a semiconductor element used for a circuit simulation. The apparatus has a specifying unit configured to specify an element structure and a physical model in the semiconductor element; a simulation unit configured to carry out local process and device simulations for parameters related to the specified element structure and physical model and calculate electric characteristics of the specified element structure; and a classification unit configured to classify the calculated electric characteristics according to bias conditions and element dimensions used in the simulations.
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申请公布号 |
US2002133785(A1) |
申请公布日期 |
2002.09.19 |
申请号 |
US20020096671 |
申请日期 |
2002.03.14 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
KONDO MASAKI |
分类号 |
G06F17/50;H01L29/00;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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地址 |
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