| 摘要 |
<p>A process for fabricating a multi-layer circuit assembly is provided. The process generally comprises:(a) providing a perforate electrically conductive core having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter);(b) applying a dielectric coating onto all exposed surfaces of the electrically conductive core to form a conformal coating on all exposed surfaces of the electrically conductive core;(c) ablating the surface of the dielectric coating in a predetermined pattern to expose sections of the electrically conductive core;(d) applying a layer of metal to all surfaces to form metallized vias through the electrically conductive core; and(e) applying a resinous photosensitive layer to the metal layer.The multi-layer circuit assemblies produced by the process, having high via density and thermal coefficients of expansion, are also provided.</p> |
