发明名称 VIDEO SIGNAL DELAY DEVICE
摘要 PROBLEM TO BE SOLVED: To make it possible to obtain an excellent distortion characteristic in all modes and minimize an output clock noise. SOLUTION: The video signal delay device is provided with a charge transfer section 20 to which three delay times are set corresponding to each of PAL. 443 NTSC, and 358 NTSC, a DC bias generating circuit 24 that generates three DC biases corresponding to each mode given to the charge transfer section 20, and three sample-hold circuits 6-8 hat sample an output of the charge transfer section 20 corresponding to the three modes. Furthermore, the delay device is also provided with a mode control circuit 2 that selects any of the three modes corresponding to the mode control signal as its control, switches 14-19 that select a delay time of the charge transfer section 20 in response to an output of the mode control circuit 2, switches 25-27 that select a DC bias level given to a video signal similarly and switches 3-5 and 9-11 to select any of the three sample-hold circuits 6-8.
申请公布号 JP2002252791(A) 申请公布日期 2002.09.06
申请号 JP20010049891 申请日期 2001.02.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NOBEKAWA HIDEO
分类号 H04N5/14;(IPC1-7):H04N5/14 主分类号 H04N5/14
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