Integrated dynamic semiconductor memory with time controlled read access

摘要

An integrated dynamic semiconductor memory has memory cells which are provided in a matrix-like memory cell array and are combined to form units with column lines and row lines. The integrated dynamic semiconductor memory has a decoder for selecting one of the column lines and a sense amplifier which is jointly allocated to all the memory cells in a selected column line. The sense amplifier is connected to a data signal line for the purpose of further processing a data signal from an addressed memory cell. The decoder for selecting one of the column lines and the sense amplifier are provided at the edge and on opposite sides of the memory cell array. By separating the control for selection of the column lines and of the data output path, successive steps in the process of read access can be controlled in a self-adjusting manner by the respective preceding signal.