发明名称 SCHNELLES LADEN VON PRÜFVEKTOREN FÜR EINE AUTOMATISCHE TESTEINRICHTUNG
摘要 Fast loading of a vector test pattern in a semiconductor device tester. Fast loading is achieved through the use of delta coding of vectors in conjunction with a vector cache in the vector loading circuitry of the tester. In this way, the total amount of information transmitted during the loading operation is reduced. Hardware required to implement the method is minimized by using random access memory conventionally found in automatic test equipment for the vector cache.
申请公布号 DE69714244(D1) 申请公布日期 2002.08.29
申请号 DE1997614244 申请日期 1997.05.22
申请人 TERADYNE INC., BOSTON 发明人 PROUDFOOT, M.;REICHERT, A.
分类号 G01R31/28;G01R31/3183;G01R31/319;(IPC1-7):G01R31/319;G06F11/273 主分类号 G01R31/28
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