发明名称 |
FPGA HAVING ENHANCED INPUT/OUTPUT CONTROL FLEXIBILITY |
摘要 |
A Field Programmable Gate Array (FPGA) device includes a plurality of input/output blocks (IOBs) and variable grain blocks (VGBs). An inter-connect network provides efficient and flexible routing of control signals from VGBs to IOBs. Control signals may include individual control signals to a predetermined IOB or common control signals to a plurality of IOBs. The inter-connect network includes vertical and horizontal inter-connect channels. The inter-connect channels are coupled to switch boxes having line segments or stubs. The line segments are coupled to an IOB control multiplexer which output control signals to IOBs. The use of stubs allows for efficient and flexible use of interconnect resources.
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申请公布号 |
WO0030258(A9) |
申请公布日期 |
2002.08.29 |
申请号 |
WO1999US27474 |
申请日期 |
1999.11.19 |
申请人 |
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发明人 |
AGRAWAL, OM, P.;SHARPE-GEISLER, BRADLEY, A.;TRAN, GIAP |
分类号 |
H03K19/177;(IPC1-7):H03K19/177 |
主分类号 |
H03K19/177 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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