| 摘要 |
A high voltage lateral semiconductor device is provided in which an n buffer region (14) surrounds an n+ drain region (11), and an n drift region (3) surrounds the n buffer region (14), while a p well region (44) surrounds the n drift region (3). No n+ source region is formed in a circular arc portion (47) of the p well region (44), but an n+ source region (46) is formed in each straight portion (48) of the p well region (44). A p+ contact region (45) surrounds the p well region (44) and the n+ source region (46). A gate oxide film is formed on a part of the n+ source region (46) located close to the n drift region, and on the p well region (44) and the outer peripheral portion of the n drill region (3), and a gate electrode is formed on the gate oxide film.
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