发明名称 Look-up table apparatus to perform two-bit arithmetic operation including carry generation
摘要 A look-up table apparatus is provided for performing two-bit arithmetic operation including carry generation. The look-up table is modified to perform two concurrent combinatorial functions, or one function for an increased number of inputs. The look-up table of the present invention can implement two full adders or subtractors, or two-bit counters, for example. One portion of the modified look-up table provides two bits of a sum output, and another portion of the modified table provides a fast carry out signal for application to a next stage of an adder/subtractor/counter.
申请公布号 US2002116426(A1) 申请公布日期 2002.08.22
申请号 US20020076116 申请日期 2002.02.14
申请人 STMICROELECTRONICS LTD. 发明人 SWAMI PARVESH
分类号 G06F1/035;G06F7/50;G06F7/501;H03K19/177;(IPC1-7):G06F7/38 主分类号 G06F1/035
代理机构 代理人
主权项
地址