PROGRAMMERBAR DATASTYRENHET

摘要

There is provided a programmable controller comprising a standard microprocessor having output address terminals and input/output bi-directional data terminals and means for providing a binary code on the data terminals indicative of the status of the machine cycle to be processed by the microprocessor. This programmable controller includes a logic decoder means for producing a selected signal in response to logic signals on selected address terminals and in the status binary code of the data terminals. In addition, the programmable controller includes means for programming the HOLD state for the microprocessor. There is also provided an arrangement for expanding the number of interrupt conditions which can affect the INTERRUPT state of the microprocessor in the programmable controller.