SYNCHRONOUS MEMORY MODULE AND MEMORY SYSTEM HAVING SELECTABLE CLOCK TERMINAL

摘要

PROBLEM TO BE SOLVED: To provide a method for holding compatibility between memory modules in a memory system including both of SDRAM DIMM and DDR- SDRAM DIMM. SOLUTION: In the memory system and memory module, a clock terminal can be selected between a clock 210 or a clock buffer 30 and components of a memory module. The system is provided with a FER switch 245 enabling/ disabling a memory module itself and a clock terminal, an enable/disable pin 290 for using these modules.