Method of changing logic circuit portion into gated clock portion and recording medium storing a program for carrying out the method

摘要

A method designs a logic circuit having a flip-flop which performs an on and off operation in response to a timing clock and a feedback loop. With such a structure, a logic circuit portion which operates in accordance with an enable signal automatically is extracted. Further, the logic circuit portion is formed by the use of a gated clock obtained by gating the timing clock via the enable signal. Thereby, the number of on and off operations of the flip-flop in response to the timing clock can be largely reduced.