发明名称 |
DATA PROCESSING SYSTEM AND DATA PROCESSOR |
摘要 |
<p>An interface means (119) for enabling connection with the other data processor (100) is provided in one data processor (101), and a function of enabling connection with the other data processor as a bus master is provided in an internal bus (108) in one data processor to allow the other data processor to directly operate a peripheral function, memory-mapped in the internal bus, from the outside via the interface means. Consequently, a data processor can use the peripheral function of another data processor without interrupting a program being run. In fact, one data processor can share the peripheral resource of another data processor.</p> |
申请公布号 |
WO02061591(A1) |
申请公布日期 |
2002.08.08 |
申请号 |
WO2001JP09322 |
申请日期 |
2001.10.24 |
申请人 |
HITACHI,LTD;NISHIMOTO, JUNICHI;NAKAZAWA, TAKUICHIRO;YAMADA, KOJI;HATTORI, TOSHIHIRO |
发明人 |
NISHIMOTO, JUNICHI;NAKAZAWA, TAKUICHIRO;YAMADA, KOJI;HATTORI, TOSHIHIRO |
分类号 |
G06F15/177;G06F1/32;G06F9/445;G06F11/00;G06F12/06;G06F13/10;G06F13/36;G06F13/38;G06F13/40;(IPC1-7):G06F13/36 |
主分类号 |
G06F15/177 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|