发明名称 |
Integrated circuits protected against reverse engineering and method for fabricating the same using etched passivation openings in passivation layer |
摘要 |
Semiconducting devices, including integrated circuits, protected from reverse engineering comprising passivation openings made in a passivation layer. When a reverse engineer etches away the passivation layer, underlying metal layers and/or other elements of the device are destroyed making the reverse engineering impossible. Top metal layer may remain intact. A method for fabricating such devices. |
申请公布号 |
AU2002236877(A1) |
申请公布日期 |
2002.08.06 |
申请号 |
AU20020236877 |
申请日期 |
2002.01.24 |
申请人 |
HRL LABORATORIES, LLC;BAUKUS, JAMES, P. |
发明人 |
LAP-WAI CHOW;JAMES P. BAUKUS;WILLIAM M. JR. CLARK |
分类号 |
H01L23/58;(IPC1-7):H01L23/58;H01L23/522 |
主分类号 |
H01L23/58 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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