| 摘要 |
PROBLEM TO BE SOLVED: To provide a non-volatile semiconductor storage device in which the area of cell size can be reduced while ensuring the lowering of the resistance of a peripheral transistor and its manufacturing method. SOLUTION: In the non-volatile semiconductor storage device having a memory cell transistor and the peripheral transistor on the same semiconductor substrate 11, metallic silicide layers 28 are formed on both diffusion layers of the memory cell transistor and the peripheral transistor and on the gate electrode of the peripheral transistor, and the contact of the memory cell transistor has a self-alignment contact structure.
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