发明名称 Semiconductor chip package and connection structure including a ground metal plane having blank patterns
摘要 An electrical connection structure for electrically connecting a semiconductor chip to an external circuit device is provided. The connection structure comprises a ground conductive plate connected to ground power of the semiconductor chip; an insulating layer formed on the ground conductive plate; a signal pattern layer formed on the insulating layer and having signal patterns in electrical communication with the semiconductor chip. The ground conductive plate includes a projected blank pattern that is the complement of the signal pattern layer. With the present invention, self inductance and mutual inductance of the connection structure is reduced. Further, because of the blank patterns formed in the proximal ground plate, the capacitance is also reduced. Therefore, both the switching output noise and cross talk is simultaneously prevented in very high frequency operation and hence electrical characteristics and performance are significantly improved in package devices such as wafer level packages and ball grid array packages operating at high data rates.
申请公布号 US2002100987(A1) 申请公布日期 2002.08.01
申请号 US20010006307 申请日期 2001.12.04
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHANG TAE-SUB;LEE DONG-HO
分类号 H01L23/12;H01L23/498;H05K3/46;(IPC1-7):H01L29/40 主分类号 H01L23/12
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