| 摘要 |
<p>A data carrier, especially a chip card, comprising at least one send/receive antenna (SP) in addition to a downstream rectifier circuit (GR) providing a supply voltage (VDD, VSS) for at least one circuit unit (S1, Si). A voltage control circuit (RS) is connected in parallel to the supply voltage terminals of the circuit unit (s) (S1, Si). A signal that is proportionate to the control signal of the voltage control circuit (RS) can be picked up at the output of the voltage control circuit (RS). Said output is connected to the control input of a controllable clock signal generator (TSG) that provides the clock signal (C1) for the at least one circuit unit (S1, Si).</p> |
