SEMICONDUCTOR DEVICE

摘要

There is provided a large capacity memory such as a DRAM and an SDRAM in which bonding pads PS and PD are put not at the center but aside between memory array regions UL and UR disposed on the upper side of a four-bank structure of banks 0 through 3 and memory array regions DL and DR disposed on the lower side firstly. Secondly, the disposition of the bonding pads Ps and PD is staggered on the right and left and the right half bonding pads PD are shifted up by about 30 mum. Only a sense amplifier, a column decoder and a main amplifier which need to be approached to the memory array regions DL and DR are disposed between the bonding pads PS and PD and the lower memory array regions DL and DR and indirect peripheral circuits are disposed on the upper side of the bonding pads PS and PD.