发明名称 TEST SYSTEM FOR ADDRESS MULTIPLEXER MEMORY WITH SERIAL ACCESS FUNCTION
摘要 PURPOSE: To provide a test system for an address multiplexer memory with a serial access function in which an input cycle is simplified. CONSTITUTION: This test system for an address multiplexer memory with a serial access function comprises memory cell arrays (13) having a plurality of memory cells storing a plurality of data, a command control section (15) to which a plurality of commands are inputted and which controls a command so that an inputted command is held and input of a command is refused in a test mode in which a test of a memory cell is performed, an address control section (16) to which a plurality of addresses are inputted and which controls an address so that an inputted address is held and input of an address is refused in a test mode, and a storage section (17) reading out continuously a plurality of data based on a command outputted from the command control section (15) and an address outputted from the address control section (16).
申请公布号 KR20020061526(A) 申请公布日期 2002.07.24
申请号 KR20020002079 申请日期 2002.01.14
申请人 NEC ELECTRONICS CORPORATION 发明人 AKIOKA TOSHIAKI
分类号 G01R31/28;G01R31/3185;G11C29/10;G11C29/12;(IPC1-7):G11C29/00 主分类号 G01R31/28
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