| 摘要 |
PURPOSE: A device and a method for variably controlling the output capacity of a memory are provided to variably control the output capacity of a memory depending on uses. CONSTITUTION: Commands and clock signals(clk,clkb) are inputted to a command decoder(105). The command decoder outputs the command signals to a bank controller(115), a mode register(120), and an address buffer(110). The bank controller controls respective banks(141,142,143,144) and a row decoder(130) depending on the command signals. The mode register sets up a writing pre-fetch(170) and a reading pre-fetch(150). The signals output from the address buffer are inputted to the mode register, the decoder, a column decoder(135), and a column address counter(125). The data signals read by the banks are inputted to the reading pre-fetch. The data signals are inputted to a data output driver(160) with the internal clock signals output from a clock buffer(155). The internal clock signals are inputted to the writing pre-fetch and an input buffer(165), and are stored in respective banks via the writing pre-fetch.
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