发明名称 CARRIER LEAKAGE SUPPRESSION METHOD AND INTEGRATED CIRCUIT INSPECTION METHOD
摘要 PROBLEM TO BE SOLVED: To provide a carrier leakage suppression method that can surely and simply suppress carrier leakage caused in an integrated circuit whose final stage bas a double balance mixer is including a differential circuit. SOLUTION: Adjusting the level of an I terminal T2 receiving an I base band signal in a 1st double balance mixer DBM 1 placed at the final stage of the integrated circuit or adjusting a level of a Q terminal T4 receiving a Q base band signal in a 2nd double balance mixer DBM 2 connected in parallel with the 1st double balance mixer DBM 1 placed at the final stage of the integrated circuit can correct the balance of the differential circuit included in the integrated circuit so as to suppress the carrier leakage.
申请公布号 JP2002198745(A) 申请公布日期 2002.07.12
申请号 JP20000395151 申请日期 2000.12.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OSAKO SHINICHI;ITO JUNJI
分类号 H03D7/14;H03D7/00;(IPC1-7):H03D7/14 主分类号 H03D7/14
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