发明名称 |
Vertical MOSFET |
摘要 |
An improved process for making a vertical MOSFET structure comprising: A method of forming a semiconductor memory cell array structure comprising: providing a vertical MOSFET DRAM cell structure having a deposited gate conductor layer planarized to a top surface of a trench top oxide on the overlying silicon substrate; forming a recess in the gate conductor layer below the top surface of the silicon substrate; implanting N-type dopant species through the recess at an angle to form doping pockets in the array P-well; depositing an oxide layer into the recess and etching said oxide layer to form spacers on sidewalls of the recess; depositing a gate conductor material into said recess and planarizing said gate conductor to said top surface of the trench top oxide.
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申请公布号 |
US2002090780(A1) |
申请公布日期 |
2002.07.11 |
申请号 |
US20010757514 |
申请日期 |
2001.01.10 |
申请人 |
DIVAKARUNI RAMACHANDRA;LEE HEON;MANDELMAN JACK A.;RADENS CARL J.;SIM JAI-HOON |
发明人 |
DIVAKARUNI RAMACHANDRA;LEE HEON;MANDELMAN JACK A.;RADENS CARL J.;SIM JAI-HOON |
分类号 |
H01L21/8242;H01L21/336;H01L27/108;H01L29/772;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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