MIS-Transistor mit einem Dreischicht-Einrichtungsisolationsfilm und Herstellungsverfahren

摘要

A device isolation film is formed on one major surface of a semiconductor substrate so as to surround a device formation region. The device isolation film consists of a first layer made of silicon dioxide, a second layer made of polycrystalline silicon, and a third layer made of silicon dioxide. In a transistor formed in the device formation region, PN junction ends of source and drain regions are in contact with the first layer, and a gate electrode and source and drain electrodes are formed within an opening of the device isolation film. The top surfaces of the gate electrode and the source and drain electrodes are substantially flush with the surface of the third layer of the device isolation film. A gate electrode wiring layer and a source/drain electrode wiring layer for one of the source and drain electrodes are formed on the surface of the third layer. A source/drain electrode wiring layer for the other of the source and drain electrodes is formed on an interlayer insulation film and connected to the source or drain electrode via a contact hole.