| 摘要 |
A circuit arrangement for testing of a tristate detection circuit has controllable switches (3-6) which simulate the three states: logical "1", logical "0", and high-impedance on a terminal (K1). Inputs (P1, P2) from comparators (1, 2) of the detection circuit are set to supply voltage or to ground. Switching of the comparators (1, 2) on and off is checked independently of the state on the terminal (K1).
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